(1) Field of the Invention
The present invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming code marks in the fabrication of integrated circuits.
(2) Description of the Prior Art
Read-only memory (ROM) devices are widely used in the art. ROM integrated circuit devices are fabricated using basically the same process steps until the memory cell content programming. From this point, a code mask is used to provide the particular mask pattern corresponding to the code contents of the ROM device. It is important to put an identification code mark on the periphery of each wafer because the ROM devices all look the same to the human eye. Customers request code identification frequently during wafer sorting, die sawing, and chip packaging.
Typically, code marks are formed by implanting an impurity into a field oxide region during code implantation. A short wet-dip process is performed. Because of the faster etch rate of the impurity implanted area, a shallow trench is formed having the code mark pattern. However, this trench is well planarized by subsequent interlevel dielectric (ILD) and intermetal dielectric (IMD) layers, especially for 0.5 xcexcm and below technology. Based on the inventors"" experience, this kind of code mark completely disappears after passivation on 0.4 xcexcm double metal mask ROM wafers.
One solution to the problem of disappearing code marks is adding an extra photoresist layer and short etching process to form a shallow code mark trench on the IMD or passivation layers. The cost of this method is an entire photoresist layer, etching, and photoresist stripping process.
Another possible solution is growing an extra nitride-based layer before the code photolithography process. The nitride-based layer is then etched after the code photolithography process to form the code mark. The cost of this method is an extra furnace or chemical vapor deposition process step and an etching step.
It is desired to find a solution to the disappearing code mark problem that will work for 0.5 xcexcm and below technology with little added overhead.
U.S. Pat. No. 6,187,638 to Wen shows a ROM code ion implant process. U.S. Pat. No. 5,393,233 to Hong et al discloses the formation of a nitride code mark where the nitride also forms dummy lines in the process of fabricating closely spaced polysilicon lines. U.S. Pat. No. 5,051,374 to Kagawa et al forms a polysilicon layer over code marks and removes passivation layers over the code marks. U.S. Pat. No. 5,576,236 to Chang et al and U.S. Pat. No. 5,668,030 to Chung et al form a code mark in a buffer layer. U.S. Pat. No. 5,705,404 to Huber et al discloses an implanted window to identify a code during failure analysis. U.S. Pat. No. 5,316,966 to Van Der Plas et al teaches an alignment mark process.
Accordingly, the primary object of the invention is to provide a process for forming a code mark on a ROM wafer in the fabrication of integrated circuits.
A further object of the invention is to provide a process for forming a code mark for 0.5 xcexcm and below technology.
Another object of the invention is to provide a process for forming a clear code mark that is independent of backend planarization.
Yet another object of the invention is to provide a process for forming a clear code mark that is independent of backend planarization by adding an extra exposing step to the normal photolithography process.
In accordance with the objects of the invention, a method for forming a clear code mark that is independent of backend planarization by adding an extra exposing step to the normal photolithography process is achieved. A layer to be patterned is provided on a substrate. A photoresist layer is coated overlying the layer to be patterned. The photoresist layer is first exposed through a code mask and second exposed through a patterning mask. The photoresist layer is developed to form a photoresist mask having a code mark pattern from the code mask and a device pattern from the patterning mask. The layer to be patterned is etched away where it is not covered by the photoresist mask to form simultaneously device structures and a code mark in the fabrication of an integrated circuit device.